In recent years, with the miniaturization of technology, the influence of statistical factors, such as process variation becomes significant, increasing circuit delay, leak fluctuations, etc. Circuit delay and leak fluctuations are factors that reduce the yield ratio of a chip, and hence there is demand for a technology that controls process variation to improve yield ratio.
Conventionally, advance process control (APC), a technology that reduces variation, has been disclosed as a technology that controls variation during chip fabrication. APC is a technology that measures a physical amount (e.g., a gate length or a film thickness) of a semiconductor wafer during fabrication and feeds back a result of the measurement to control the physical amount (see, for example, Tsuchiya, Ryota; Izawa, Masaru; and Kimura, Shinichiro, “Prospect of Si Semiconductor Devices and Manufacturing Technologies in Nanometer era”, Hitachi Hyoron, 2006, Vol. 88, No. 3, Line 20 in the right column on p. 44 (4.3 Problem and Prospect of Mass Production Techniques) to Line 20 in the left column on p. 45, FIG. 10)
However, according to the conventional technology, a monitor that measures a physical amount of a semiconductor wafer is arranged at a position that is critical in terms of process (e.g., a position with a reduced film thickness), while a critical position that is dependent on circuit characteristics, layout, etc. is disregarded; hence, a problem arises in that this technology cannot cope with a reduction in yield ratio due to circuit dependent factors of variation.